45 research outputs found

    Huffman-based Code Compression Techniques for Embedded Systems

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    An Algorithm for Inferring Big Data Objects Correlation Using Word Net

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    © 2016 The Authors. The value of big data comes from its variety where data is collected from various sources. One of the key big data challenges is identifying which data objects are relevant or refer to the same logical entity across various data sources. This challenge is traditionally known as schema matching. Due to big data velocity traditional approaches to data matching can no longer be used. In this paper we present an approach for inferring data objects correlation. We present our algorithm that relies on the objects meta-data and it consults the Word Net thesaurus

    Time efficient segmented technique for dynamic programming based algorithms with FPGA implementation

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    © 2019 World Scientific Publishing Company. Although dynamic programming (DP) is an optimization approach used to solve a complex problem fast, the time required to solve it is still not efficient and grows polynomially with the size of the input. In this contribution, we improve the computation time of the dynamic programming based algorithms by proposing a novel technique, which is called SDP: Segmented Dynamic programming . SDP finds the best way of splitting the compared sequences into segments and then applies the dynamic programming algorithm to each segment individually. This will reduce the computation time dramatically. SDP may be applied to any dynamic programming based algorithm to improve its computation time. As case studies, we apply the SDP technique on two different dynamic programming based algorithms; Needleman-Wunsch (NW) , the widely used program for optimal sequence alignment, and the LCS algorithm, which finds the Longest Common Subsequence between two input strings. The results show that applying the SDP technique in conjunction with the DP based algorithms improves the computation time by up to 80% in comparison to the sole DP algorithms, but with small or ignorable degradation in comparing results. This degradation is controllable and it is based on the number of split segments as an input parameter. However, we compare our results with the well-known heuristic FASTA sequence alignment algorithm, GGSEARCH . We show that our results are much closer to the optimal results than the GGSEARCH algorithm. The results are valid independent from the sequences length and their level of similarity. To show the functionality of our technique on the hardware and to verify the results, we implement it on the Xilinx Zynq-7000 FPGA

    Multi-modal image classification of COVID-19 cases using computed tomography and X-rays scans

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    COVID pandemic across the world and the emergence of new variants have intensified the need to identify COVID-19 cases quickly and efficiently. In this paper, a novel dual-mode multi-modal approach is presented to detect a covid patient. This has been done using the combination of image of the chest X-ray/CT scan and the clinical notes provided with the scan. Data augmentation techniques are used to extrapolate the dataset. Five different types of image and text models have been employed, including transfer learning. The binary cross entropy loss function and the adam optimizer are used to compile all of these models. The multi-modal is also tried out with existing pre-trained models such as: VGG16, ResNet50, InceptionResNetV2 and MobileNetV2. The final multi-modal gives an accuracy of 97.8% on the testing data. The study provides a different approach to identifying COVID-19 cases using just the scan images and the corresponding notes

    Multiple histogram-based face recognition with high speed FPGA implementation

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    Face recognition is an algorithm that is capable of identifying or verifying a query face from multiple faces in the enrollment database. It poses a challenging problem in the field of image analysis and computer vision, especially for applications that deal with video sequences, face re-identification, or operate on intensity images and require fast processing. In this work, we introduce a high speed face recognition technique along with a high speed FPGA implementation. It uses a new similarity measure to estimate the distance between the query face and each of the database face images. The distance metric is the sum of the standard deviations between multiple histograms, which are calculated from each row of the query and database images. The lowest distance score refers to the database face that matches the query. The proposed technique is independent from the ambient illumination and outperforms the well-known face recognition algorithm "Eigenfaces" (it performs the face recognition 16 x faster when both algorithms run on the same platform). Furthermore, we exploit data parallelism in our proposed algorithm to design a hardware accelerator and to implement it on an FPGA prototyping board. The results show 10x execution time improvement in comparison to the software version

    Time history for <i>x</i><sub>2</sub> synchronization using LQR and adaptive control for different percentages of uncertainty.

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    (a) Adaptive control when δ = 40%, (b) LQR when δ = 40%, (c) Adaptive control when δ = 60%, (d) LQR when δ = 60%, (e) Adaptive control when δ = 100%, and (f) LQR when δ = 100%.</p

    Basic blocks connections required to implement the master system on FPGA.

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    Basic blocks connections required to implement the master system on FPGA.</p

    Matlab/Simulink detailed representation of the LQR block of the 4-D hyper-chaotic system.

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    Matlab/Simulink detailed representation of the LQR block of the 4-D hyper-chaotic system.</p

    Comparing the error-index ISE of LQR and adaptive control in synchronization of the 4D-hyperchaotic system for different percentages of uncertainty.

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    Comparing the error-index ISE of LQR and adaptive control in synchronization of the 4D-hyperchaotic system for different percentages of uncertainty.</p

    Matlab/Simulink Block diagram of the proposed secured communication system.

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    Matlab/Simulink Block diagram of the proposed secured communication system.</p
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